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M61044FP
3-Battery Version, Reset Pin
REJ03F0066-0100Z Rev.1.0 Sep.19.2003
Description
The M61044FP is an semiconductor IC device developed for smart battery packs. It incorporates all the analog circuitry required by smart batteries in a single chip. When used in conjunction with a microprocessor, it allows the implementation of a variety of functions, such as battery capacity detection, through the addition of minimal peripheral devices and is ideal for smart battery system (SBS) battery packs. The M61044FP also has an on-chip overcurrent detect circuit so that the FET for controlling battery charging and discharging is protected regardless of the processing speed of the microprocessor. The microprocessor can change the amplifier gain of the charge/discharge current detect circuit, so battery capacity detection accuracy is increased. In addition, the M61044FP incorporates a linear regulator that allows it to function as the power supply for the microprocessor, thereby simplifying power supply block design.
Features
* * * * * * On-chip high-gain op-amp for monitoring charge and discharge current. On-chip overcurrent detect circuit to protect FET. Charge/discharge FET can be controlled from microprocessor. Power-save function for reducing current consumption. 3.3 V operation to reduce microprocessor current consumption. High-voltage device (absolute maximum rating: 33 V).
Application
Smart battery system (SBS) battery packs
This product is currently under development, and its specifications, pin assignments, etc., are subject to change.
Pin Connection Diagram (Top View)
VCC RESET VIN_1 VIN_2 VIN_3 VIN_12 DFOUT CFOUT
1 2
16 VREG 15 DI
M61044FP
3 4 5 6 7 8
14 CK 13 CS 12 CIN 11 Analog_out 10 VIN_11 9 GND
Package: 16P-TSSOP
Rev.1.0, Sep.19.2003, page 1 of 34
M61044FP
Block Diagram
CFOUT VCC VREG
Series regulator Regulator On/off control Power-down circuit Battery voltage detect circuit Charge/discharge current detect circuit FET control circuit Overcurrent detect circuit Delay circuit
DFOUT
CIN
VIN_12
RESET CK DI CS
Serial/parallel converter circuit
VIN_1
VIN_2
Gain switcher circuit
Analog _OUT
Output selector
Shift voltage adjustor
Battery 1-3 analog output
VIN_3
VIN_11
GND
Rev.1.0, Sep.19.2003, page 2 of 34
M61044FP
Pin Function
Table 1
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Symbol Vcc RESET VIN_1 VIN_2 VIN_3 VIN_12 DFOUT CFOUT GND VIN_11 Analog_OUT CIN CS Function The chip's power supply pin. Power is supplied by the charger or the battery. Output pin for microprocessor reset signal. Positive input pin for lithium ion battery 1. Negative input pin for lithium ion battery 1. Positive input pin for lithium ion battery 2. Negative input pin for lithium ion battery 2. Positive input pin for lithium ion battery 3. Charger connect monitor pin. Detects changes from power-down status. Output pin for discharge FET on/off signals. Also turns off when overcurrent detected. Output pin for charge FET on/off signals. Ground pin. Negative input pin for lithium ion battery 3. Connected to charge/discharge current sensor resistor. Charge/discharge current monitor pin. Connected to charge/discharge current sensor resistor. Output pin for analog signals. Capacity connection pin for setting overcurrent prevention delay time. When this pin is low level, data input is accepted and data can be stored in a 6-bit shift register. At the rising edge from low to high the value in the 6-bit shift register is latched. Shift clock input pin. At the rising edge to high the input signal from the DI pin is input to the 6-bit shift register. Shift data input pin. Serial data with a data length of 6 bits may be input via this pin. Power supply pin for microprocessor. Power can be shut off using a signal from the microprocessor.
14 15 16
CK DI Vreg
Operation
The M61044FP is an semiconductor IC device developed for smart battery packs. It is ideal for smart battery system (SBS) battery packs that consist of four lithium ion batteries connected in series. A high-voltage device, it is suitable for use with a wide variety of charger systems. It incorporates all the analog circuitry required by smart batteries in a single chip. When used in conjunction with a microprocessor, it allows the implementation of a variety of functions, such as battery capacity detection, through the addition of minimal peripheral devices. The functions of the M61044FP are described below.
1. Battery Voltage Detect Circuit The M61044FP can output the voltage levels of the batteries connected in series via the Analog_out pin. An on-chip buffer amplifier monitors the pin voltages of the batteries. Offset voltage correction using adjustment by the microprocessor is also supported. The M61044FP is configured to detect the battery voltage using a microprocessor driven using a power supply voltage of 5.2 V.
2. Charge/Discharge Current Detect Circuit SBS requires a function for monitoring the battery capacity. The M61044FP uses an on-chip amplifier to monitor battery capacity based on a drop in the voltage of an external sensor resistor. In this way, the charge/discharge current is converted into a voltage. The voltage amplification ratio can be adjusted from the microprocessor. In addition, the current output shift voltage can be adjusted from the microprocessor, widening the allowable dynamic range of the A/D converter.
Rev.1.0, Sep.19.2003, page 3 of 34
M61044FP 3. Overcurrent Detect Circuit The M61044FP has an on-chip overcurrent detect circuit. If an excessive current flows from the lithium ion batteries, the discharge control FET is shut off after a set delay time, halting discharge. This makes the battery pack safer. The delay time can be set using an external capacitor. It is possible to determine the overcurrent detect status by monitoring the CIN pin. The overcurrent detect circuit provides protection regardless of the processing speed of the microprocessor.
4. Series Regulator The M61044FP has an on-chip low-dropout series regulator. It can be used as the power supply for the microprocessor, thereby simplifying power supply block design.
VCC VREF1 + M1 Vreg ON/OFF R1 R2
From serial/parallel converter circuit
Figure 3 Series Regulator
5. Reset Circuit The reset circuit of the M61041FP monitors the voltage of the Vreg pin. If the power supply voltage of the microprocessor drops the reset circuit operates, preventing microprocessor runaway. Microprocessor runaway is avoided because the microprocessor is reset if the battery pack left standing and the battery voltage is allowed to drop. This enhances the safety of battery packs that are left unused. In addition, reset circuit monitors the voltage of the Vreg pin when the battery pack is connected to the charger, ensuring that a reset will be applied if the voltage supplied to the microprocessor becomes excessively small. This helps to guarantee reliable operation.
6. Power-Save Function The M61044FP is equipped with a power-save function. When the battery voltage is being monitored a portion of the charge/discharge current monitor circuit automatically stops operating, and when the charge/discharge current is being monitored the battery voltage monitor circuit automatically stops operating. This helps prevent unnecessary power consumption. In addition, current consumption is further reduced by setting the analog output selector to ground potential output when in the standby mode.
Rev.1.0, Sep.19.2003, page 4 of 34
M61044FP Transition to Power-Down Mode When the microprocessor determines that the battery voltage has dropped it sends a power-down instruction via the interface circuit. When it receives the instruction, the M61044FP's DFOUT pin switches to high voltage. In addition, the VIN_12 pin is pulled down to low level by an internal resistor. When the VIN_12 pin goes to low potential after reception of the power-down instruction, output from the series regulator stops, switching the M61044FP into powerdown mode. At this point the operation of the circuitry is completely halted. In this status CFOUT is high level and DFOUT is high level (external charge/discharge prohibited status). The maximum current consumption of the M61044FP is 1.0 A in order to prevent any further drop in the battery voltage.
DFOUT VIN_12
VCC
CFOUT
Ground level after excess discharge
Series regulator
Control signals from interface circuit
VIN_1
Vreg
RESET
Regulator On/off control Internal reset circuit Serial/parallel converter circuit
M61044FP
CK DI CS
Figure 4 Operation After Excess Discharge Detection
Cancellation of Power-Down Mode If the battery pack is connected to a charger when the M61044FP is in the power-down mode (VIN_12 becomes high level), the series regulator immediately begins to operate. The power-down mode is canceled, and once again the M61044FP is ready to receive instructions from the microprocessor.
Absolute Maximum Ratings
Table 2
Item Absolute maximum rating Power supply voltage Allowable loss Ambient operating temperature Storage temperature Symbol Vabs Vcc PD Topr Tstg Rated Value 33 30 500 -20 to +85 -40 to +125 Unit V V mW C C Conditions
Rev.1.0, Sep.19.2003, page 5 of 34
M61044FP
Standard
CK TSDI DI THDI
TSCS CS
THCS
Figure 5 Interface Block Timing Definitions
Rev.1.0, Sep.19.2003, page 6 of 34
M61044FP
Electrical Characteristics
Table 3 (Ta = 25C, Vcc = 14 V unless otherwise specified)
Rated Value Block All Item Power supply voltage Circuit current 1 Circuit current 2 Circuit current 3 Circuit current (power-down mode) Regulator Output voltage Input stability Load stability Input voltage (VCC pin) Symbol Vsup Isup1 Isup2 Isup3 Ipd Min. 60 55 25 Typ. 150 140 80 Max. 30 215 200 115 0.5 Unit V A A A A Circuit 1 1 1 1 1 Command 1 2 3 4 During charge/discharge current monitoring During battery voltage monitoring During ground output (initial status) All circuits halted, VIN_12 = GND Vcc = 10.5V, Iout = 30mA Vcc = 6.0V to 24V, Iout = 30mA Vcc = 6.0V, Iout = 0.1mA to 30mA Conditions
Vreg Vout10 Vout20 VIN0 VdetVdet+ Vd1
3.220 6.0 2.600 2.900 0.08
3.3 60 30 2.750 2.975 0.1
3.380 100 50 30 2.900 3.050 0.12
V mV mV V V V V
2 2 2 2 2 2 3
5
Reset detect voltage 1 Reset cancel voltage 1
Overcurrent detect Overcurrent prevention voltage 1 Overcurrent prevention voltage 2 Overcurrent prevention delay time 1 Overcurrent prevention delay time 2 Battery voltage detect Input offset voltage 1 Voltage amplification ratio 1 Output source current capacity Output sink current capacity Maximum detect battery voltage
Vd2
Vcc/3 x0.6 7
Vcc/3
Vcc/3 x1.4 15
V
4
5
Load short detected
Tvd1
10
ms
3
5
CICT = 0.01F
Tvd2
150
250
350
s
4
5
Voff1 Gamp1
31 0.594
206 0.600
385 0.606
mV
5 5
6 7
Isource1 Isink1 Vmo_max
150 150 4.64

A A V
6 6 5
8 9 (Vreg-Voff1)/Gamp1
Rev.1.0, Sep.19.2003, page 7 of 34
M61044FP
Rated Value Block Charge/disc harge current detect Item Input offset voltage Voltage amplification ratio 21 Voltage amplification ratio 22 Voltage amplification ratio 23 Current output shift voltage 1 Current output shift voltage 2 Current output shift voltage 3 Current output shift voltage 4 Output source current capacity Output sink current capacity Interface DI input H voltage DI input L voltage CS input H voltage CS input L voltage CK input H voltage CK input L voltage DI setup time DI hold time CS setup time CS hold time Symbol Voff2 Gain21 Min. 0.5 19.2 Typ. 1.2 20 Max. 1.9 20.8 Unit V Circuit 7 7 Command 10* 11* Conditions Gain = 100
Gain22
38.4
40
41.6
7
12*
Gain23
96
100
104
7
13*
Vios1 Vios2 Vios3 Vios4 Isource2
0.36 0.76 1.14 1.53 150
0.41 0.83 1.24 1.65
0.46 0.90 1.34 1.77
V V V V A
7 7 7 7 8
14* 15* 16* 17* 18*
Isink2
150
A
8
18*
VDIH VDIL VCSH VCSL VCKH VCKL TSDI THDI TSCS THCS
Vreg-0.5 0 Vreg-0.5 0 Vreg-0.5 0 600 600 600 600

Vreg 0.5 Vreg 0.5 Vreg 0.5
V V V V V V ns ns ns ns
9 9 9 9 9 9 9 9 9 9

Refer to figures 1 to 9 for the circuits and to table 4 for the command sequences used for measurement. * For the charge/discharge current detect block, different command sequences are used during charging and discharging.
Rev.1.0, Sep.19.2003, page 8 of 34
M61044FP
Measurement Circuit Diagrams
During Ipd measurement: S1 = off, S2 = on All other times: S1 = on, S2 = off
CFOUT VCC VIN_1 VIN_2
DFOUT VIN_12 VREG
S1 S2
CREG 4.7F
M61044FP
DI CK CS CIN ANALOG Data input VREG VSS CIN 0.01F
A
VIN_3 VCC RESET GND VIN_11
VCK
VCS
Circuit 1
S4
VDI S1
_OUT
S2
CFOUT VCC VIN_1 VIN_2 VCC
DFOUT VIN_12 VREG
VS_reg
S3
V
M61044FP
DI CK CS CIN ANALOG Data input VREG VSS CIN 0.01F
1M
VIN_3 RESET GND VIN_11
VM_reset
VCK
VCS
V
Circuit 2
Rev.1.0, Sep.19.2003, page 9 of 34
VDI
_OUT
VM_reg
CREG
M61044FP
CFOUT VCC VIN_1 VIN_2 VIN_3 VCC RESET GND VIN_11
DFOUT VIN_12 VREG CREG 4.7F
V
M61044FP
DI CK CS CIN 0.01F ANALOG VCK VCS VDI _OUT Data input VREG VSS
VIN_11
Circuit 3
CFOUT VCC VIN_1 VIN_2 VIN_3 VCC RESET GND VIN_11
DFOUT VIN_12 VREG
VIN_12
V
CREG 4.7F
M61044FP
DI CK CS CIN ANALOG VCK VCS VDI _OUT Data input VREG VSS CIN 0.01F
Circuit 4
Rev.1.0, Sep.19.2003, page 10 of 34
M61044FP
CFOUT VCC VIN_1 VBAT1 VIN_2 VBAT2 VIN_3 VBAT3 RESET GND VIN_11
DFOUT VIN_12 VREG CREG 4.7F
M61044FP
DI CK CS CIN ANALOG VCK VCS VDI _OUT Data input VREG VSS CIN 0.01F
V
Circuit 5
CFOUT VCC VIN_1 VIN_2 VBAT2 VIN_3 VBAT3 RESET GND VIN_11
DFOUT VIN_12 VREG CREG 4.7F
M61044FP
VBAT1
DI CK CS CIN ANALOG VCK VCS VDI _OUT Data input VREG VSS CIN 0.01F
A
Circuit 6
Rev.1.0, Sep.19.2003, page 11 of 34
M61044FP
CFOUT VCC VIN_1 VIN_2 VIN_3 VCC RESET GND VIN_11 VIN_11
DFOUT VIN_12 VREG CREG 4.7F
M61044FP
DI CK CS CIN ANALOG VCK VCS VDI _OUT Data input VREG VSS CIN 0.01F
V
Circuit 7
CFOUT VCC VIN_1 VIN_2 VIN_3 VCC RESET GND VIN_11
DFOUT VIN_12 VREG CREG 4.7F
M61044FP
DI CK CS CIN ANALOG VCK VCS VDI _OUT Data input VREG VSS CIN 0.01F
VIN_11
A
Circuit 8
Rev.1.0, Sep.19.2003, page 12 of 34
M61044FP
V V
CFOUT VCC VIN_1 VBAT1 DFOUT VIN_12 VREG VIN_12 CREG 4.7F
M61044FP
VIN_2 VBAT2 VIN_3 VBAT3 RESET GND
DI CK CS CIN ANALOG Data input VREG VSS CIN 0.01F
VIN_11
VIN_11
VCS
VCK
VDI
_OUT
V
Circuit 9
Rev.1.0, Sep.19.2003, page 13 of 34
M61044FP Table 4 Command Sequences Used for Measuring Rated Values
No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Command Sequence (00)8 (24)8 (31)8 (43)8 (52)8 (00)8 (10)8 (43)8 (51)8 (00)8 (00)8 (71)8 (00)8 (43)8 (00)8 (51)8 (14)8 (15)8 (16)8(17)8 (00)8 (51)8 (10)8 (11)8 (12)8(13)8 (00)8 (51)8 (13)8 (00)8 (51)8 (17)8 (00)8 (43)8 (52)8 (37)8 (00)8 (43)8 (52)8 (31)8 (35)8 (00)8 (43)8 (52)8 (32)8 (36)8 (00)8 (43)8 (52)8 (33)8 (37)8 (00)8 (43)8 (52)8 (31)8 (24)8 (00)8 (43)8 (52)8 (31)8 (25)8 (00)8 (43)8 (52)8 (31)8 (26)8 (00)8 (43)8 (52)8 (31)8 (27)8 (00)8 (43)8 (52)8 (31)8 VIN_11 Input 90mV 0mV 0mV 0mV 0mV 0mV 0mV 0mV 0mV 0mV 90mV 45mV 7mV 90mV 90mV 90mV 90mV 45mV
Notes : 1. Indications such as (00)8 show the address and data, in that order, of the serial data from the microprocessor in octal notation. 2. Numbers 10 to 17 are command sequences used during charging. For the commands used during discharging, substitute (53)8 for (52)8. 3. During measurement, the voltage listed in table 4 should be input to VIN_11. When measuring during charging, the specified voltage should be input to VIN_11 as a negative voltage. The specified voltage should be input to VIN_11 as a positive voltage during discharging.
Description of Circuit Blocks
(1) Battery Voltage Detect Circuit As shown in figure 6, the battery voltage detect circuit block of the M61044FP consists of switches, a buffer amplifier, a reference voltage circuit, and a logic circuit. When the voltage to be detected is selected, based on serial data from the microprocessor, the appropriate switch connections are determined by the logic circuit. The voltages Vbat1, Vbat2, and Vbat3 from the batteries connected to the M61044FP, multiplied by Gamp1 (0.6), are output from the Analog_out pin. It is also possible to output an offset voltage. In the power-save mode all the switches are turned off, so the current consumption of this circuit block is zero. Note : The settling time of this circuit block after voltage changes is about 50 s.
Rev.1.0, Sep.19.2003, page 14 of 34
M61044FP
S11
VIN_1
S22
Switch control From serial/parallel converter circuit
Vbat1
S21
Logic circuit
VIN_2
S32
M61044FP ; R2=0.6 x R1 Vbat2 S31
R2 VIN_3 S42 R1
Vbat3
R1 S41 R2 GND
To Analog_Out
S02 GND S01
Voff
Figure 6 Battery Voltage Detect Circuit
Battery Voltage Monitoring Method To select battery voltage detection, serial data (51)8 is sent from reset status (00)8. The V1 battery voltage (Vin1) is output from the analog output pin by sending (10)8. Next, (15)8 is sent to switch the analog output pin from the V1 battery voltage to the V1 offset voltage (Voff1). The actual voltage (Vbat1) can be obtained by the microprocessor by calculating Vbat1 = (Vin1 - Voff1) / Gamp. The same method can be used for Vbat2 and Vbat3 in order to monitor the battery voltage with a high degree of accuracy.
(2) Charge/Discharge Current Detect Block As shown in figure 7, the charge/discharge current detect block of the M61044FP consists of a preamplifier current output shift voltage adjustment circuit, a buffer amplifier, and dividing resistors. The voltage difference indicated by the sensor resistor is amplified to the ground reference voltage by the preamplifier. The gain can be switched using serial signals from the microprocessor. The output is impedance converted by the buffer amplifier. It is also possible to switch the current detect shift voltage using the microprocessor.
Rev.1.0, Sep.19.2003, page 15 of 34
M61044FP
Vreg = 3.3V AMP2 AMP3 To Analog_Out RC1 R RC2 R Charge current monitor RC3 From serial/parallel converter circuit
R RD1 R Charge current monitor RD2 RD3
AMP1 AMP4 Shift voltage adjustment circuit VIN_11 From serial/parallel converter circuit
GND
GND
Rsense
Figure 7 Charge/Discharge Current Detect Block
Figure 8 illustrates the circuit block's operation during discharge current detection. The discharge current flows into Rsense, and any voltage drop that occurs is applied to the positive terminal of the amplifier (AMP1). The amplifier's gain can be increased by an instruction from the microprocessor, making it possible to monitor even minute discharge currents with high accuracy. To allow monitoring of the charge current, the voltage generated by VIN_11 is inverted and amplified before being output. The other aspects use the same operating principle as that described above.
From interface circuit
Vb=Icha x Rsens x Gain
AMP2 RC1 RC2
RC3
RD1 AMP1 RD2 RD3 GND
Va=Idis x Rsens x Gain VIN_11 Charge current I c h a
Rsense
Discharge current I d i s
Figure 8 Charge/Discharge Current Detect Explanation Diagram
Rev.1.0, Sep.19.2003, page 16 of 34
M61044FP Charge Current Monitoring Method Serial data (43)8 is sent from reset status to turn on the discharge control FET. When the charger is connected in this status a current flows between the VIN_11 pin and the GND pin (across the RSENSE sensor transistor), causing the voltage Vin1 to be generated. Sending (52)8 switches the output of the analog output pin to charge current output. At this point the amplifier used for monitoring the charge current is still off, so the analog output pin outputs ground potential. Next, a value between (35)8 and (37)8 is selected to switch the amplifier's amplification ratio. In this way the amplification ratio of the amplifier used for monitoring the charge current is switched to GainC. At this point the voltage of the analog output pin is the offset voltage of the charge current monitor amplifier (VoffC). If the offset voltage VoffC is higher than the value listed in table 5, the shift voltage select command between (24)8 and (27)8 that corresponds to VoffC is sent and once again the offset voltage is measured, this time as VoffC_S. Next, a value between (31)8 and (33)8 is selected to switch the current monitor amplifier's amplification ratio. At this point the voltage of the analog output pin is VaoutC. It is possible to calculate the charge current based on the analog output pin voltages resulting from the above settings. When calculating the current value, VoffC_S offset and VaoutC current monitor values measured using the same amplification ratio should be used. Table 6 is a list of the measurable current values.
Icha (charge current) = Vin1 / RSENSE (sensor resistor value) ... (1) VaoutC - VoffC_S = Vin1 x GainC ... (2) Based on (1) and (2) it is possible to calculate the charge current. Icha (charge current) = (VaoutC - VoffC_S) / GainC / RSENSE
Discharge Current Monitoring Method Serial data (43)8 is sent from reset status to turn on the discharge control FET. When a load is connected in this status a current flows between the VIN_11 pin and the GND pin (across the RSENSE sensor transistor), causing the voltage Vin1 to be generated. Sending (53)8 switches the output of the analog output pin to discharge current output. At this point the amplifier used for monitoring the discharge current is still off, so the analog output pin outputs ground potential. Next, a value between (35)8 and (37)8 is selected to switch the amplifier's amplification ratio. In this way the amplification ratio of the amplifier used for monitoring the discharge current is switched to GainD. At this point the voltage of the analog output pin is the offset voltage of the discharge current monitor amplifier (VoffD). If the offset voltage VoffD is higher than the value listed in table 5, the shift voltage select command between (24)8 and (27)8 that corresponds to VoffD is sent and once again the offset voltage is measured, this time as VoffD_S. Next, a value between (31)8 and (33)8 is selected to switch the current monitor amplifier's amplification ratio. At this point the voltage of the analog output pin is VaoutD. It is possible to calculate the discharge current based on the analog output pin voltages resulting from the above settings. When calculating the current value, VoffD_S offset and VaoutD current monitor values measured using the same amplification ratio should be used. Table 6 is a list of the measurable current values.
Idis (discharge current) = Vin1 / RSENSE (sensor resistor value) ... (1) VaoutD - VoffD_S = Vin1 x GainD ... (2) Based on (1) and (2) it is possible to calculate the discharge current. Idis (discharge current) = (VaoutD - VoffD_S) / GainD / RSENSE
Discharge Current Measurable Range The range of discharge current values that can be measured is determined by the sensor resistor value, the Vreg voltage, and the amplification ratio of the current monitor amplifier. Refer to table 6 for details. The current value is proportional to the sensor resistor value, so if the sensor resistor value changes it is possible to determine the new measurable range of current values by multiplying the sensor resistor value by the current coefficient value listed in table 6.
Rev.1.0, Sep.19.2003, page 17 of 34
M61044FP Table 5 Shift Voltage Switching Offset Voltage
Vreg Voltage 3.3V 3.3V 3.3V 3.3V Measurement Offset Value 0.55V or higher 1.00V or higher 1.45V or higher 1.90V or higher Shift Setting Voltage -0.4V -0.8V -1.2V -1.6V Select Command (24)8 (25)8 (26)8 (27)8
Table 6 Measurable Current Values
Maximum Measurable Current Value Vreg Voltage 3.3V 3.3V 3.3V Note
Current Monitor Amplifier Amplification Ratio 20x 40x 100x
20 m Sensor Resistor 6.6A (Vcc = 7.0V) 3.3A (Vcc = 7.0V) 1.3A (Vcc = 7.0V)
1
Current 2 Coefficient 0.131 0.065 0.027
Minimum Resolution (10bit A/D) 7.3mA 3.6mA 1.5mA
1 The maximum measurable current value is dependent on the Vcc voltage. If the Vcc voltage drops the maximum measurable current value also drops. 2 If the sensor resistor value changes the current coefficient becomes the maximum measurable current value divided by the new sensor resistor value. Example: If the sensor resistor value = 15 m, Vreg = 3.3 V, and the amplification ratio is 20x ... Maximum measurable current value = 0.131(current coefficient) / 0.015 [] = 8.73 [A] (sensor resistor value)
(3) Overcurrent Detect Circuit Block As shown in figure 9, the overcurrent detect circuit block of the M61044FP consists of a comparator, a reference voltage circuit, and a delay circuit. The detection voltage can be adjusted by trimming, making possible highly accurate voltage detection in conjunction with a sensor resistor. In addition, it is possible to determine when the M61044FP is in overcurrent detect status by monitoring the CIN pin using the microprocessor. The M61044FP is also equipped with a simplified load detect circuit. Based on the status of the Vin12 pin it is possible to provide protection with a shorter delay time than when using overcurrent detection.
Rev.1.0, Sep.19.2003, page 18 of 34
M61044FP
DFOUT VIN_12
To microprocessor Delay circuit + CIN VIN_11 GND Rsense Vref1
Battery
Figure 9 Overcurrent Detect Circuit Block
(4) Series Regulator The series regulator circuit is shown in figure 10. A Pch MOS transistor is used as the output control transistor. The output voltage is adjusted by the M61044FP internally, so no external devices, such as resistors, are required. Note : Due to the structure of the control transistor a parasite diode is formed between VCC and Vreg. This means that the M61044FP can be destroyed by reverse current if the Vreg potential exceeds VCC. Consequently, Vreg should be limited to VCC + 0.3 V or less.
VCC
VREF1 + M1 Vreg ON/OFF R1 R2
From serial/parallel converter circuit
Figure 10 Series Regulator
Rev.1.0, Sep.19.2003, page 19 of 34
M61044FP (5) Reset Circuit Block As shown in figure 11, the reset circuit block of the M61041FP consists of a converter, a reference voltage circuit, and bleeder resistors. Output is via the Nch open drain circuit, so an external CR can be connected to specify the cancel delay time. The reset circuit monitors the Vreg output and prevents microprocessor runaway if the power supply voltage should drop do to some sort of malfunction.
Vreg
R1
+
Reset
R2
Vref1
Rh
GND
Figure 11 Reset Circuit Block
Digital Data Format
Last 6-bit shift register D5 CS Address D4 D3 decoder D2 D1 D0 First
MSB DI CK
LSB
Latch MPX
Battery voltage adjuster
Latch MPX
Shift voltage adjuster
Latch MPX
Current gain adjuster
Latch MPX
FET controller
Latch MPX
Output selector
Latch MPX
VR, overcurrent controller
Figure 12 Serial/Parallel Converter Circuit Block Diagram
Rev.1.0, Sep.19.2003, page 20 of 34
M61044FP Data Timing Diagram (Model)
LSB DI D0 D1 D2 D3 D4 MSB D5
CK
CS
Figure 13 Serial/Parallel Converter Circuit Timing Chart
Data Content Table 7
Address Setting Data Reset Battery voltage selector Current output shift voltage adjuster Current monitor gain adjuster FET controller Output selector Regulator Overcurrent detection controller D5 0 0 0 0 1 1 1 D4 0 0 1 1 0 0 1 D3 0 1 0 1 0 1 1 Data D2 D1 D0 See table 8 See table 9 See table 10 See table 11 See table 12 See table 13 Content
Data Content Table 8 Battery Voltage Selector
D5 to D3 001 001 001 001 001 001 001 001 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Output Voltage 0 V (no shift voltage) V1 voltage V2 voltage V3 voltage 0 V (no shift voltage) V1 offset voltage V2 offset voltage V3 offset voltage Note Selected after reset
Note : V1 voltage is selected after reset. The V0 offset voltage should not be used.
Rev.1.0, Sep.19.2003, page 21 of 34
M61044FP Table 9 Current Output Shift Voltage Adjuster
D5 to D3 010 010 010 010 010 010 010 010 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Current Output Shift Voltage Value 0 V (no shift voltage) 0 V (no shift voltage) 0 V (no shift voltage) 0 V (no shift voltage) 0.4V 0.8V 1.2V 1.6V Vreg/8x1 Vreg/8x2 Vreg/8x3 Vreg/8x4 Note Selected after reset
Note : No current output shift voltage after reset.
Table 10 Charge/Discharge Current Detector
D5 to D3 011 011 011 011 011 011 011 011 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Output Gain Switch Amplifier off 20x (current value output) 40x (current value output) 100x (current value output) Amplifier off 20x (offset output) 40x (offset output) 100x (offset output) Same as after reset Note Selected after reset
Note : Amplifier off after reset.
Table 11 FET Controller
D5 to D3 100 100 100 100 100 100 100 100 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 CFOUT High Low High Low Don't care Don't care Don't care Don't care DFOUT High High Low Low Don't care Don't care Don't care Don't care Note Selected after reset
Note : DFOUT and CFOUT pins set to off after reset. (Current control FET is off when output is high level.)
Table 12 Output Selector
D5 to D3 101 101 101 101 101 101 101 101 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Output Selection Ground output Battery voltage value output Charge current value output Discharge current value output Don't care Don't care Don't care Don't care Note Selected after reset
Note : Ground potential output after reset.
Rev.1.0, Sep.19.2003, page 22 of 34
M61044FP Table 13 Regulator, Overcurrent Detection Controller
D5 to D3 111 111 111 111 111 111 111 111 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Voltage Regulator Output ON OFF ON ON Don't care Don't care Don't care Don't care Overcurrent Detect Circuit ON OFF CIN pin fixed low CIN pin fixed high Don't care Don't care Don't care Don't care Note Selected after reset Both circuits off Overcurrent circuit off Overcurrent circuit off
Note : Regulator output and overcurrent circuit both on after reset.
Note: A setting of 111001 caused the M61042FP to transition to the power-down mode. However, transition to the power-down mode does not occur when connected to a charger (VIN_12 is high level).
Rev.1.0, Sep.19.2003, page 23 of 34
M61044FP
Timing Charts
Charging Sequence
Battery voltage (V)
5 4 3 2 1 0 From bottom: Vbat1, Vbat2, Vbat3
Vbat3 reaches overcharge detect voltage Charging time
0.15 0.1 0.05 0 -0.05 -0.1 -0.15 20
VIN_11 (V)
During discharge
During charging
CFOUT (V)
15 10 5 0 20 Off during initialization Instruction from microprocessor Start of charging
Instruction from microprocessor End of charging
DFOUT (V)
15 10 5 0 Off during initialization
Vreg (V) & Reset (V) Battery voltage (V)
20 15 10 5 0 5 4 3 2 1 0 5 4 3 2 1 0 Vreg
VIN_12 pin VCC pin VIN_1 pin
Charger connected
Reset
Analog_out (V)
Gain 100 Microprocessor operation start
Battery 3 Battery 2 Battery 1 monitor monitor monitor
Charge current monitor
Gain 20
Battery voltage monitor
Note: A fixed-voltage charger is used.
Figure 15 Charging Sequence
Rev.1.0, Sep.19.2003, page 24 of 34
M61044FP Discharge Sequence
Battery voltage (V)
5 4 3 2 1 0 During discharge Vbat3 reaches excess discharge detect voltage
From top: Vbat1, Vbat2, Vbat3
Discharge time
Self-discharge time
0.15 0.1 0.05 0 -0.05 -0.1 -0.15 20
VIN_11 (V)
Start of discharge End of discharge
During Load connection charging
CFOUT (V)
15 10 5 0 20
Instruction from microprocessor Off in power-down mode
DFOUT (V)
End of discharge Instruction from microprocessor Off in power-down mode
15 10 5 0
Battery voltage (V)
20 15 10 5 0 5 4 3 2 1 0 5 Reset VIN_12 pin Pulled down to ground potential when discharge prohibited VCC pin VIN_1 pin
Vreg (V) & Reset (V)
System stop Instruction from microprocessor Vreg
Analog_out (V)
4 3 2 1 0
Gain 100 Gain 20 Discharge current monitor
Battery 1 Battery 2 Battery 3 monitor monitor monitor
Battery voltage monitor
Figure 16 Discharge Sequence
Rev.1.0, Sep.19.2003, page 25 of 34
M61044FP Overcurrent Sequence
Battery voltage (V)
5 4 3 2 1 0 0.8
Vbat1=Vbat2=Vbat3
Rush current
Overcurrent
Load short
VIN_11 (V)
0.6 0.4 0.2 0
During discharge
Rush current
Overcurrent
Load short
-0.2 20
CFOUT (V) DFOUT (V)
15 10 5 0 20 15 10 5 0 End of discharge End of discharge
Battery voltage (V)
20 15 10 VIN_12 pin 5 0
VIN_1 pin
VCC pin
Vreg (V) & Reset (V)
5 4 3 2 1 0 5 Vreg Reset
Analog_out (V)
4 3 2 1 0 Discharge current monitor Gain 20
Figure 17 Overcurrent Sequence
Rev.1.0, Sep.19.2003, page 26 of 34
M61044FP Principal Item Characteristics Overall
Current Consumption (ISUP1)-Power Supply Voltage (VCC) Characteristics Temp.=25C
200A
Current Consumption (ISUP1)-Temperature (Ta) Characteristics
Vcc=10.5V 200A
180A
180A
160A
160A
140A
140A
120A
120A
100A 5V 10V 15V 20V 25V 30V
100A -50C
-25C
0C
25C
50C
75C
100C Vcc=10.5V
Current Consumption (ISUP2)-Power Supply Voltage (VCC) Characteristics Temp.=25C
200A
Current Consumption (ISUP3)-Temperature (Ta) Characteristics
200A
180A
180A
160A
160A
140A
140A
120A
120A
100A 5V 10V 15V 20V 25V 30V
100A -50C
-25C
0C
25C
50C
75C
100C
Current Consumption (IPS)-Power Supply Voltage (VCC) Characteristics Temp.=25C
120A
Current Consumption (IPS)-Temperature (Ta) Characteristics
Vcc=10.5V 120A
100A
100A
80A
80A
60A
60A
40A 5V 10V 15V 20V 25V 30V
40A -50C
-25C
0C
25C
50C
75C
100C Vcc=10.5V
Current Consumption (IPD)-Power Supply Voltage (VCC) Characteristics Temp.=25C
0.05A
Current Consumption (IPD)-Temperature (Ta) Characteristics
0.05A
0.04A
0.04A
0.03A
0.03A
0.02A
0.02A
0.01A
0.01A
0.00A 5V 10V 15V 20V 25V 30V
0.00A -50C
-25C
0C
25C
50C
75C
100C
Rev.1.0, Sep.19.2003, page 27 of 34
M61044FP Regulator Block
Regulator Output Voltage (VREG)-Power Supply Voltage (VCC) Characteristics Temp.=100C
3.40
Regulator Output Voltage (VREG)-Temperature (Ta) Characteristics
Vcc=30V 3.40
3.35
3.35
3.30
3.30
3.25
30mA 20mA 10mA 0.1mA 10V 15V 20V 25V 30V
3.25
30mA 20mA 10mA 0.1mA -25C 0C 25C 50C 75C 100C Vcc=14V
3.20 5V
3.20 -50C
Regulator Output Voltage (VREG)-Power Supply Voltage (VCC) Characteristics Temp.=25C
3.40
Regulator Output Voltage (VREG)-Temperature (Ta) Characteristics
3.40
3.35
3.35
3.30
3.30
3.25
30mA 20mA 10mA 0.1mA 10V 15V 20V 25V 30V
3.25
30mA 20mA 10mA 0.1mA -25C 0C 25C 50C 75C 100C
3.20 5V
3.20 -50C
Regulator Output Voltage (VREG)-Power Supply Voltage (VCC) Characteristics Temp.=-25C
3.40
Regulator Output Voltage (VREG)-Temperature (Ta) Characteristics
Vcc=6V 3.40
3.35
3.35
3.30
3.30
3.25
30mA 20mA 10mA 0.1mA 10V 15V 20V 25V 30V
3.25
30mA 20mA 10mA 0.1mA -25C 0C 25C 50C 75C 100C
3.20 5V
3.20 -50C
Regulator Output Voltage (VREG)-Output Current (IREG) Characteristics Temp.=25C
3.5V 3.0V 2.5V 2.0V 1.5V 1.0V 0.5V 0.0V 0.00A 6V 14V 30V 0.05A 0.10A 0.15A 0.20A 0.25A
Regulator Output Voltage (VREG)-Output Current (IREG) Characteristics Vcc=14V
3.5V 3.0V 2.5V 2.0V 1.5V 1.0V 0.5V 0.0V 0.00A 90C 25C -30C 0.05A 0.10A 0.15A 0.20A 0.25A
Rev.1.0, Sep.19.2003, page 28 of 34
M61044FP Overcurrent Detect Block
Overcurrent 1 Detect Voltage (VIOV1)-Temperature (Ta) Characteristics Vcc=10.5V
0.12V
Overcurrent 1 Detect Delay Time (TIOV1)-Temperature (Ta) Characteristics Vcc=10.5V 15mS
0.11V
13mS
0.10V
11mS
0.09V
9mS
0.08V -30C
0C
30C
60C
90C
7mS -30C
0C
30C
60C
90C
Overcurrent 2 Detect Voltage (VCC/VIOV2)-Temperature (Ta) Characteristics Vcc=10.5V 4.2
3.8
Overcurrent 2 Detect Delay Time (TIOV2)-Temperature (Ta) Characteristics Vcc=10.5V
350S
300S 3.4 3.0 2.6 200S 2.2 1.8 -30C 150S -30C 250S
0C
30C
60C
90C
0C
30C
60C
90C
Overcurrent Hold Detect Voltage (VCC-VIOVX)-Temperature (Ta) Characteristics Vcc=10.5V 3.0V
Overcurrent 1 Detect Delay Time (TIOV1)-Capacitance (CICT) Characteristics Vcc=10.5V 500mS
450mS
2.8V
400mS 350mS
2.6V
300mS 250mS
2.4V
200mS 150mS
2.2V
100mS 50mS
2.0V -30C
0C
30C
60C
90C
0mS 0.0F
0.1F
0.2F
0.3F
0.4F
0.5F
Rev.1.0, Sep.19.2003, page 29 of 34
M61044FP Reset Block
Overcurrent 1 Detect Voltage (VIOV1)-Temperature (Ta) Characteristics Vcc=10.5V 3.1V Overcurrent 1 Detect Delay Time (TIOV1)-Temperature (Ta) Characteristics Vcc=10.5V
50S 45S 3.0V 40S 35S 30S 2.8V 25S 20S VdetVdet+ 2.6V -30C 0C 30C 60C 90C 15S 10S -30C TdetTdet+
2.9V
2.7V
0C
30C
60C
90C
Battery Voltage Detect Block
Battery Voltage Input Offset Voltage (VOFF1)-Temperature (Ta) Characteristics VREG=3.3V
0.40V 0.35V 0.30V 0.25V 0.20V 0.15V 0.10V -30C V1_offset V2_offset V3_offset 0C 30C 60C 90C
Battery Voltage Amplification Ratio 1 (Gamp1)-Temperature (Ta) Characteristics VREG=3.3V
1.00% 0.75% 0.50% 0.25% 0.00% -0.25% -0.50% -0.75% -1.00% -30C V1_Gain_err V2_Gain_err V3_Gain_err 0C 30C 60C 90C
Rev.1.0, Sep.19.2003, page 30 of 34
M61044FP Battery Voltage Detect Block
Battery Voltage Input Offset Voltage (VOFF2)-Temperature (Ta) Characteristics VREG=3.3V 18mV
16mV 14mV 12mV 10mV 8mV 6mV -30C Offset20 Offset20 Offset40 Offset40 Offset100 Offset100 Offset200 0C 30C 60C 90C
Discharge Current Input Offset Voltage (VOFF2)-Temperature (Ta) Characteristics VREG=3.3V 18mV
16mV 14mV 12mV 10mV 8mV 6mV -30C Offset20 Offset20 Offset40 Offset40 Offset100 Offset100 Offset200 0C 30C 60C 90C
Battery Voltage Amplification Ratio (Gamp2)-Temperature (Ta) Characteristics VREG=3.3V
4% 3% 2% 1% 0% -1% -2% -3% -4% -30C Gain_err20 Gain_err20 Gain_err40 Gain_err40 Gain_err100 Gain_err100 Gain_err200 0C 30C 60C 90C
Discharge Current Amplification Ratio (Gamp2)-Temperature (Ta) Characteristics VREG=3.3V
4% 3% 2% 1% 0% -1% -2% -3% -4% -30C Gain_err20 Gain_err20 Gain_err40 Gain_err40 Gain_err100 Gain_err100 Gain_err200 0C 30C 60C 90C
Rev.1.0, Sep.19.2003, page 31 of 34
M61044FP
Sample Application Circuit
To + terminal
DFET
CVCC
CFET See note 3. RCF
CIN1 RIN1 VDD CREG VIN_1 D F O UVCC
CCF
CFOU
Vcc SENC RIN1
OUT
VREG RRST RESET VIN_ CIN1 RIN2 VIN_ CIN2 RIN3 VIN_ CIN3
Battery 3 Battery 2 Battery 1
2
Rese
nd
VIN_
M61044FP
Protect
CRST VREF AD_IN CK CS DI D G NA G N D _ I N D AD See note 2. A N A L O G _ O CK CS DI CIN CIN1 CICT To - terminal
VIN_
Notes on Circuit Board Design 1. The current sensor resistor (RSENSE) should be located adjacent to the VSS and VIN_11 pins of the M61042FP. In addition, no circuitry other than that recommended above should be added between the M61042FP and RSENSE. Any extraneous current flow in this channel could result in errors when measuring the charge and discharge currents. 2. The load capacitance of the ANALOG_OUT pin, including parasite capacitance, should be no more than 10 pF. If a capacitor of more than 10 pF is connected, the output from ANALOG_OUT may begin to oscillate. 3. Power supply fluctuations during overcurrent detection and when connected to a charger may cause the M61042FP to reset. It is possible to prevent incorrect operation by connecting a CR filter to the control signal of the charge control FET.
Rev.1.0, Sep.19.2003, page 32 of 34
M3751
VIN_
VIN_
VIN_1 RIN1
GND
CIN_
See note 1.
RSENS
Figure 18 Sample Application Circuit
M61044FP Table 14 External Device Constants
Device Pch MOSFET Pch MOSFET Resistor Capacitor Symbol DFET CFET RIN1 CIN1 Purpose Discharge control Charge control ESD countermeasure Power supply fluctuation countermeasure ESD countermeasure Power supply fluctuation countermeasure ESD countermeasure Power supply fluctuation countermeasure Charger reverse connection countermeasure Power supply fluctuation countermeasure Power supply fluctuation countermeasure Power supply fluctuation countermeasure Power supply fluctuation countermeasure Charge/discharge current monitoring Delay time setting Output voltage fluctuation countermeasure Delay time setting Delay time setting Power supply fluctuation countermeasure Power supply fluctuation countermeasure Recommen ded Value 10 0.22F Min. Max. 1k 1.0F Notes 1) Values differ among RIN2 to RIN3.
Resistor Capacitor
RIN2 CIN2
1k 0.22F

1M 1.0F
Resistor Capacitor
RIN3 CIN3
1k 0.22F

1M 1.0F
2) RIN2 and CIN2 should be set to the same value.
Resistor
RIN12
10k
300
100k
3) The upper value for confirmation of overcurrent operation should be adjusted as necessary.
Capacitor
CIN12
0.01F
0.1F
Resistor
RIN11
100
200
3) The upper value for confirmation of overcurrent operation should be adjusted as necessary.
Capacitor
CIN11
0.1F
1.0F
Capacitor
CVCC
0.22F
Sensor resistor Capacitor Capacitor
RSENSE CICT CREG
20m 0.01F 4.7F
0.47F
0.47F

Resistor Capacitor Resistor
RRST CRST RCF
47k 0.1F 1k
10k 500
10M
5) Adjustment should be performed in conjunction with the microprocessor. 3) The upper value for confirmation of overcurrent operation should be adjusted as necessary.
Capacitor
CCF
0.1F
0.047F
Note: When designing applications, due consideration should be given to safety.
Rev.1.0, Sep.19.2003, page 33 of 34
M61044FP
Package Dimensions
16P2X
Note : Please contact Renesas Technology Corporation for further details.
Rev.1.0, Sep.19.2003, page 34 of 34
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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